MOSFET Gate Charge Time Calculator

MOSFET Gate Charge Time Calculator

Estimate gate source current, sink current, Miller plateau timing, practical rise and fall time, and gate-drive power from MOSFET charge and driver settings.

Driver and MOSFET presets

Choose a realistic starting point, then edit the gate charge, resistor, driver current, and switching frequency to match the datasheet conditions.

📝Gate timing inputs
Used for the summary label and reference comparison.
Use Qg at the same Vgs used by the driver, not only the headline maximum.
This plateau charge is the best quick estimate for drain voltage edge time.
Common values are 4.5 V, 5 V, 10 V, 12 V, and 15 V.
Peak turn-on current available while charging the MOSFET gate.
Peak turn-off current available while discharging the MOSFET gate.
Series resistor between the driver output and gate for the turn-on path.
Use the same value as turn-on unless a diode split path is used.
A simple average for high-side and low-side driver resistance.
Often listed as Rg or gate resistance in the MOSFET datasheet.
PWM or switching frequency used for gate-drive power.
Use 1 for one MOSFET switching each period, 2 for a complementary leg.
Parallel MOSFET gates multiply charge and drive power.
Frequency estimate keeps turn-on plus turn-off inside this share of the period.

Gate charge timing result

Logic FET GPIO Buffer
Turn-on Miller time
16.0 ns
Qgd / source current
Turn-off Miller time
11.4 ns
Qgd / sink current
Gate drive power
6.0 mW
Qg x Vgs x frequency
Frequency at budget
1,823 kHz
Turn-on + turn-off at 5%

Formula breakdown

📊MOSFET and driver spec grid
12 nC
Total Qg
4 nC
Miller Qgd
0.25 A
Effective source
0.35 A
Effective sink
13.7 Ω
Turn-on path
10.5 Ω
Turn-off path
48 ns
Full charge
34 ns
Full discharge
📘Driver preset reference table
PresetGate chargeDriver source / sinkTypical frequency
Logic FET GPIO Buffer12 nC total, 4 nC Miller0.25 A / 0.35 A100 kHz low-side switching
24 V LED Dimmer24 nC total, 8 nC Miller0.8 A / 1.0 A25 kHz dimming PWM
Synchronous Buck FET38 nC total, 11 nC Miller2.0 A / 2.5 A250 kHz converter leg
Half-Bridge Gate Driver72 nC total, 20 nC Miller4.0 A / 4.0 A80 kHz bridge stage
Large Power MOSFET180 nC total, 56 nC Miller9.0 A / 12.0 A15 kHz high-current stage
Gate charge timing table
Formula itemFormulaWhat it estimatesPlanning note
Full charge timeQg / IsourceApproximate gate voltage ramp timeUse total Qg at actual Vgs
Full discharge timeQg / IsinkApproximate gate pull-down timeSink current is often higher than source
Miller turn-on timeQgd / IsourceMain drain voltage fall intervalDominates switching loss estimate
Miller turn-off timeQgd / IsinkMain drain voltage rise intervalCheck dv/dt and EMI target
Gate drive powerQg x Vgs x fDriver supply power before lossesMultiply for parallel MOSFETs
🔌Gate resistor and current limit table
Gate pathCurrent estimateSpeed effectDesign use
Driver limitedIeff = driver currentChanging Rg has little effectDriver is the bottleneck
Resistor limitedIeff = Vgs / RtotalHigher Rg slows edge timingUseful for EMI and ringing control
Split turn-on pathRgOn sets source edgeControls drain voltage fallUse for turn-on loss and dv/dt
Split turn-off pathRgOff sets sink edgeControls drain voltage riseUse for shoot-through margin
📈Frequency and drive power table
Switching caseTypical QgFrequency bandPower concern
Slow load switch20 to 120 nC1 Hz to 2 kHzTiming matters more than drive power
Motor PWM30 to 100 nC16 to 40 kHzDriver heating usually modest
DC-DC converter10 to 80 nC100 to 600 kHzGate drive power can be significant
Parallel power bank100 nC and up5 to 80 kHzMultiply Qg by each MOSFET gate
💡Calculation tips
Miller plateau note: Total gate charge estimates how long the driver spends moving the gate from off to on. Qgd is the plateau portion where the drain voltage actually moves, so it is the better quick proxy for MOSFET switching edge time.
Resistance note: Add the external gate resistor, driver output resistance, and MOSFET internal gate resistance. The effective current is the lower of the driver current rating and Vgs divided by that total path resistance.

When your power stage blows up on work bench, you’ll probably notice that there’s no immediate burning silicon aroma in the air. Instead, maybe what you smell is the burnt varnish on the gate driver IC, which managed to pump too much current into a trace too thin for it’s liking. Easy enough error, but it serves as a stern reminder: What happens if you switch a MOSFET? The easy answer people give is “it conducts.” That’s true, but it also becomes a capacitor load; first it needs to be charged and then it starts conducting. Charge it too fast, and you risk creating voltage spikes that kill other circuitry. Charge it too slow, and you’re wasting energy.

You don’t have to guess if your driver is good enough. The calculator above figures out the numbers for your device’s specific specs, and then you just input those numbers into tool. The basic idea here is something called gate charge (typically referred to as Qg in datasheet). That figure indicate the amount of electric work the driver needs to do to activate transistor.

How to Choose the Right MOSFET Gate Driver

So you read “fifty nanocoulombs” and think, “Why does this matter?” Well, it matters because every coulomb of charge takes some specific level of current from your driver chip. A five-nanocoulomb gate charges up ten times faster then a fifty-nanocoulomb one when your driver provides half an amp. That wait is where all the inefficiency happens.

The thing about all of this that most designers think about is the overall switch-on time. But what occurs during the Miller plateau. During this period, while current continues to flow into gate, the gate voltage stop rising. Why? Because now that it has enough to keep going, it’s using charge to alter drain voltage rather than raising itself further. See, folks mess up right there. They look at their gate voltage hitting 10 volts and think, “Hah! Switched on!” Nope. Just leaving the plateau phase. And that’s when the MOSFET is in a very low-efficiency state. The calculator will split off this Qgd, or Miller charge, as it directly controls how much of the MOSFET’s time are spent here.

And then there’s resistance, which subtly but critically matter as well: To minimize electromagnetic interference or ringing, most of us is going to add a resistor from our driver to the gate pin. Small thing, but it matters. That resistor also caps how much current can be delivered to charge the gate capacitance. Sure, maybe your driver chip says it’s got a ten-amp source, but with a fifty-ohm series resistor to throttle things, that means almost nothing flow through at five volts. And the tool takes all of that into account, allowing you to specify both driver resistance and external/internal resistors independently. Together they decide who’s the bottleneck: Is it the driver? Or the resistor? Knowing that can help you determine when it’s time to change components versus when changing a single value would of do.

Another hidden cost of high frequency designs is the gate drive power. For every on-off cycle of the MOSFET you dump some energy back into its gate capacitance, then lose it again by heating up when you switch it off. Low frequencies are no big deal. At several hundred kilohertz with large power devices, the gate drive IC itself may get too warm to work. Make sure you check whether your selected IC has sufficient thermal headroom before pouring solder around it.

This gets even more complicated if you use parallel MOSFETs. If you place several transistors in parallel to deal with increased current, then total transistor gate charge is multiplied. That means the driver has to feed three times the capacitance with the same amount of current. The timing slow down, and power dissipation triple. There’s a field on the calculator for just such a situation, so that you don’t undersize your array by accident.

So in summary, what makes a good gate drive circuit? Balance stability with speed. How quickly do you need to turn the switch on or off to minimize conduction losses? It must also avoid causing voltage overshoot and punching through parasitic capacitance. In short: there’s not a one-size-fits-all answer for all boards. Your thermal constraints, supply voltage, and layout will all matter. Find the sweet spot where you have nice clean signals on the oscilloscope, the MOSFET isn’t getting too hot, and the driver isn’t struggling to keep up. Those days of smoking bench tops don’t happen as often when you know how resistance, current, and charge play together.

MOSFET Gate Charge Time Calculator

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